=from 2005.5.30.7:45.AM
=to ...5.30.8:30.AM
Some interesting ideas jumped into my head while I was reading Carl's "Computer Organization" these days.
I suppose it is possible to translate Verilog's behavioral codes, such as the "always" blocks directly to Perl codes that implement *built-in* circuit elements, just like the AND gates. Such transformation can be mechanical, since Verilog and Perl share many control-flow structures.
Obviously, Tesla will no longer be a pure gate-level simulator after some built-in blackbox components are introduced. These blackboxes provide sequential logic behaviors to the outside world, but are implemented by pure "software" methods, not logic circuits!
Tesla's built-in component repertoire will be extensible. We can have complex component types like "Register" and "Counter" that are implemented by ordinary Perl codes. This feature not only eases the pain of writing a Verilog-to-Tesla compiler, but also makes Tesla extremely powerful in high-level simulations.
A further step can be taken by changing the Tesla's built-in signals from individual wires to multi-channel buses. Oh, no! I think it is more appropriate to use inheritance here. Let the Wire and Bus classes both be derived from an abstract class named Signal. Therefore, Wires and Buses will be distinguished without breaking the existing code that uses Signals.
Porting the whole Tesla system to Perl6 is even more attractive. Pugs now supports sufficient Perl6 features; this plan thus becomes quite feasible.
